DocumentHdrVersion "1.1"
Header (DocumentHdr
packageRefs [
(PackageRef
library "ieee"
unitName "std_logic_1164"
itemName "all"
)
(PackageRef
library "ieee"
unitName "std_logic_unsigned"
itemName "all"
)
]
)
version "15.1"
appVersion "2002.1b (Build 7)"
model (Symbol
VExpander (VariableExpander
vvMap [
(vvPair
variable " "
value " "
)
(vvPair
variable "HDLDir"
value "D:\\CMS_FED\\back_end_fpga\\vhdl"
)
(vvPair
variable "SideDataDesignDir"
value "D:\\CMS_FED\\back_end_fpga\\src\\frame_sync_sig_gen\\interface.info"
)
(vvPair
variable "SideDataUserDir"
value "D:\\CMS_FED\\back_end_fpga\\src\\frame_sync_sig_gen\\interface.user"
)
(vvPair
variable "SourceDir"
value "D:\\CMS_FED\\back_end_fpga\\src"
)
(vvPair
variable "appl"
value "HDL Designer - Pro"
)
(vvPair
variable "d"
value "D:\\CMS_FED\\back_end_fpga\\src\\frame_sync_sig_gen"
)
(vvPair
variable "d_logical"
value "D:\\CMS_FED\\back_end_fpga\\src\\frame_sync_sig_gen"
)
(vvPair
variable "date"
value "07/23/04"
)
(vvPair
variable "day"
value "Fri"
)
(vvPair
variable "day_long"
value "Friday"
)
(vvPair
variable "dd"
value "23"
)
(vvPair
variable "ext"
value "<TBD>"
)
(vvPair
variable "f"
value "interface"
)
(vvPair
variable "f_logical"
value "interface"
)
(vvPair
variable "group"
value "UNKNOWN"
)
(vvPair
variable "host"
value "TE2MALDIVES"
)
(vvPair
variable "library"
value "back_end_fpga"
)
(vvPair
variable "library_downstream_LeonardoSpectrum"
value "D:\\CMS_FED\\back_end_fpga\\ls"
)
(vvPair
variable "library_downstream_LeonardoSpectrum(GUI)"
value "D:\\CMS_FED\\back_end_fpga\\ls"
)
(vvPair
variable "library_downstream_ModelSim"
value "D:\\CMS_FED\\back_end_fpga\\sim"
)
(vvPair
variable "mm"
value "07"
)
(vvPair
variable "month"
value "Jul"
)
(vvPair
variable "month_long"
value "July"
)
(vvPair
variable "p"
value "D:\\CMS_FED\\back_end_fpga\\src\\frame_sync_sig_gen\\interface"
)
(vvPair
variable "p_logical"
value "D:\\CMS_FED\\back_end_fpga\\src\\frame_sync_sig_gen\\interface"
)
(vvPair
variable "series"
value "HDL Designer Series"
)
(vvPair
variable "time"
value "14:30:08"
)
(vvPair
variable "unit"
value "frame_sync_sig_gen"
)
(vvPair
variable "user"
value "st79"
)
(vvPair
variable "version"
value "2002.1b (Build 7)"
)
(vvPair
variable "view"
value "interface"
)
(vvPair
variable "year"
value "2004"
)
(vvPair
variable "yy"
value "04"
)
]
)
uid 121,0
optionalChildren [
*1 (SymbolBody
uid 8,0
optionalChildren [
*2 (CptPort
uid 2321,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2322,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,6625,15000,7375"
)
n "be_status_reg"
t "std_logic_vector"
b "(31 DOWNTO 0)"
o 72
r 2
st 0
s 0
sf 1
tg (CPTG
uid 2323,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2324,0
va (VaSet
)
xt "16000,6500,21600,7500"
st "be_status_reg"
blo "16000,7300"
tm "CptPortNameMgr"
)
s (Text
uid 2325,0
va (VaSet
isHidden 1
)
xt "16000,7500,28500,8500"
blo "16000,8300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 2326,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,3200,76500,4000"
st "be_status_reg       : IN     std_logic_vector (31 DOWNTO 0) ;
"
)
)
*3 (CptPort
uid 2327,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2328,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,8625,15000,9375"
)
n "clk1x"
t "std_logic"
o 45
r 3
st 0
s 0
sf 1
tg (CPTG
uid 2329,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2330,0
va (VaSet
)
xt "16000,8500,17600,9500"
st "clk1x"
blo "16000,9300"
tm "CptPortNameMgr"
)
s (Text
uid 2331,0
va (VaSet
isHidden 1
)
xt "16000,9500,19100,10500"
blo "16000,10300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 2332,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4000,66500,4800"
st "clk1x               : IN     std_logic  ;
"
)
)
*4 (CptPort
uid 2333,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2334,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,11625,15000,12375"
)
n "done"
t "std_logic"
o 71
r 4
st 0
s 0
sf 1
tg (CPTG
uid 2335,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2336,0
va (VaSet
)
xt "16000,11500,17600,12500"
st "done"
blo "16000,12300"
tm "CptPortNameMgr"
)
s (Text
uid 2337,0
va (VaSet
isHidden 1
)
xt "16000,12500,19100,13500"
blo "16000,13300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 2338,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4800,66500,5600"
st "done                : IN     std_logic  ;
"
)
)
*5 (CptPort
uid 2339,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2340,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,9625,15000,10375"
)
n "en_fe_data_capture"
t "std_logic"
o 50
r 5
st 0
s 0
sf 1
tg (CPTG
uid 2341,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2342,0
va (VaSet
)
xt "16000,9500,23300,10500"
st "en_fe_data_capture"
blo "16000,10300"
tm "CptPortNameMgr"
)
s (Text
uid 2343,0
va (VaSet
isHidden 1
)
xt "16000,10500,19100,11500"
blo "16000,11300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 2344,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,5600,66500,6400"
st "en_fe_data_capture  : IN     std_logic  ;
"
)
)
*6 (CptPort
uid 2345,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2346,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "29000,15625,29750,16375"
)
n "en_trkr_hdr_fifo_wr"
t "std_logic"
m 1
o 2
r 18
st 0
s 0
sf 1
tg (CPTG
uid 2347,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2348,0
va (VaSet
)
xt "20800,15500,28000,16500"
st "en_trkr_hdr_fifo_wr"
ju 2
blo "28000,16300"
tm "CptPortNameMgr"
)
s (Text
uid 2349,0
va (VaSet
isHidden 1
)
xt "24900,16500,28000,17500"
ju 2
blo "24900,17300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 2350,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,16000,66500,16800"
st "en_trkr_hdr_fifo_wr : OUT    std_logic  ;
"
)
)
*7 (CptPort
uid 2351,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2352,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,14625,15000,15375"
)
n "FE_trigger"
t "std_logic"
o 46
r 1
st 0
s 0
sf 1
tg (CPTG
uid 2353,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2354,0
va (VaSet
)
xt "16000,14500,20600,15500"
st "FE_trigger"
blo "16000,15300"
tm "CptPortNameMgr"
)
s (Text
uid 2355,0
va (VaSet
isHidden 1
)
xt "16000,15500,19100,16500"
blo "16000,16300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 2356,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,2400,66500,3200"
st "FE_trigger          : IN     std_logic  ;
"
)
)
*8 (CptPort
uid 2357,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2358,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,12625,15000,13375"
)
n "frame_sync_en"
t "std_logic"
o 3
r 6
st 0
s 0
sf 1
tg (CPTG
uid 2359,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2360,0
va (VaSet
)
xt "16000,12500,21800,13500"
st "frame_sync_en"
blo "16000,13300"
tm "CptPortNameMgr"
)
s (Text
uid 2361,0
va (VaSet
isHidden 1
)
xt "16000,13500,19100,14500"
blo "16000,14300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 2362,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,6400,66500,7200"
st "frame_sync_en       : IN     std_logic  ;
"
)
)
*9 (CptPort
uid 2363,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2364,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "29000,20625,29750,21375"
)
n "frm_sync_in_en"
t "std_logic"
m 1
o 2
r 19
st 0
s 0
sf 1
tg (CPTG
uid 2365,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2366,0
va (VaSet
)
xt "22000,20500,28000,21500"
st "frm_sync_in_en"
ju 2
blo "28000,21300"
tm "CptPortNameMgr"
)
s (Text
uid 2367,0
va (VaSet
isHidden 1
)
xt "24900,21500,28000,22500"
ju 2
blo "24900,22300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 2368,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,16800,66500,17600"
st "frm_sync_in_en      : OUT    std_logic  ;
"
)
)
*10 (CptPort
uid 2369,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2370,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,13625,15000,14375"
)
n "mode_reg"
t "std_logic_vector"
b "(3 DOWNTO 0)"
o 46
r 7
st 0
s 0
sf 1
tg (CPTG
uid 2371,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2372,0
va (VaSet
)
xt "16000,13500,19400,14500"
st "mode_reg"
blo "16000,14300"
tm "CptPortNameMgr"
)
s (Text
uid 2373,0
va (VaSet
isHidden 1
)
xt "16000,14500,28100,15500"
blo "16000,15300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 2374,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,7200,76000,8000"
st "mode_reg            : IN     std_logic_vector (3 DOWNTO 0) ;
"
)
)
*11 (CptPort
uid 2375,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2376,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,10625,15000,11375"
)
n "reset"
t "std_logic"
o 3
r 8
st 0
s 0
sf 1
tg (CPTG
uid 2377,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2378,0
va (VaSet
)
xt "16000,10500,17700,11500"
st "reset"
blo "16000,11300"
tm "CptPortNameMgr"
)
s (Text
uid 2379,0
va (VaSet
isHidden 1
)
xt "16000,11500,19100,12500"
blo "16000,12300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 2380,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,8000,66500,8800"
st "reset               : IN     std_logic  ;
"
)
)
*12 (CptPort
uid 2381,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2382,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,15625,15000,16375"
)
n "temp_bus"
t "std_logic_vector"
b "(47 DOWNTO 0)"
o 1
r 9
st 0
s 0
sf 1
tg (CPTG
uid 2383,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2384,0
va (VaSet
)
xt "16000,15500,19200,16500"
st "temp_bus"
blo "16000,16300"
tm "CptPortNameMgr"
)
s (Text
uid 2385,0
va (VaSet
isHidden 1
)
xt "16000,16500,28500,17500"
blo "16000,17300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 2386,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,8800,76500,9600"
st "temp_bus            : IN     std_logic_vector (47 DOWNTO 0) ;
"
)
)
*13 (CptPort
uid 2387,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2388,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "29000,8625,29750,9375"
)
n "tracker_header"
t "std_logic_vector"
b "(63 DOWNTO 0)"
m 1
o 1
r 20
st 0
s 0
sf 1
tg (CPTG
uid 2389,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2390,0
va (VaSet
)
xt "22200,8500,28000,9500"
st "tracker_header"
ju 2
blo "28000,9300"
tm "CptPortNameMgr"
)
s (Text
uid 2391,0
va (VaSet
isHidden 1
)
xt "15500,9500,28000,10500"
ju 2
blo "15500,10300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 2392,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,17600,75500,18400"
st "tracker_header      : OUT    std_logic_vector (63 DOWNTO 0)
"
)
)
*14 (CptPort
uid 2393,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2394,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,17625,15000,18375"
)
n "tracker_header_1"
t "std_logic_vector"
b "(127 DOWNTO 0)"
o 1
r 10
st 0
s 0
sf 1
tg (CPTG
uid 2395,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2396,0
va (VaSet
)
xt "16000,17500,22600,18500"
st "tracker_header_1"
blo "16000,18300"
tm "CptPortNameMgr"
)
s (Text
uid 2397,0
va (VaSet
isHidden 1
)
xt "16000,18500,28900,19500"
blo "16000,19300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 2398,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,9600,77000,10400"
st "tracker_header_1    : IN     std_logic_vector (127 DOWNTO 0) ;
"
)
)
*15 (CptPort
uid 2399,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2400,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,18625,15000,19375"
)
n "tracker_header_2"
t "std_logic_vector"
b "(127 DOWNTO 0)"
o 1
r 11
st 0
s 0
sf 1
tg (CPTG
uid 2401,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2402,0
va (VaSet
)
xt "16000,18500,22600,19500"
st "tracker_header_2"
blo "16000,19300"
tm "CptPortNameMgr"
)
s (Text
uid 2403,0
va (VaSet
isHidden 1
)
xt "16000,19500,28900,20500"
blo "16000,20300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 2404,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,10400,77000,11200"
st "tracker_header_2    : IN     std_logic_vector (127 DOWNTO 0) ;
"
)
)
*16 (CptPort
uid 2405,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2406,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,19625,15000,20375"
)
n "tracker_header_3"
t "std_logic_vector"
b "(127 DOWNTO 0)"
o 1
r 12
st 0
s 0
sf 1
tg (CPTG
uid 2407,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2408,0
va (VaSet
)
xt "16000,19500,22600,20500"
st "tracker_header_3"
blo "16000,20300"
tm "CptPortNameMgr"
)
s (Text
uid 2409,0
va (VaSet
isHidden 1
)
xt "16000,20500,28900,21500"
blo "16000,21300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 2410,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,11200,77000,12000"
st "tracker_header_3    : IN     std_logic_vector (127 DOWNTO 0) ;
"
)
)
*17 (CptPort
uid 2411,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2412,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,20625,15000,21375"
)
n "tracker_header_4"
t "std_logic_vector"
b "(127 DOWNTO 0)"
o 1
r 13
st 0
s 0
sf 1
tg (CPTG
uid 2413,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2414,0
va (VaSet
)
xt "16000,20500,22600,21500"
st "tracker_header_4"
blo "16000,21300"
tm "CptPortNameMgr"
)
s (Text
uid 2415,0
va (VaSet
isHidden 1
)
xt "16000,21500,28900,22500"
blo "16000,22300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 2416,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,12000,77000,12800"
st "tracker_header_4    : IN     std_logic_vector (127 DOWNTO 0) ;
"
)
)
*18 (CptPort
uid 2417,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2418,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,21625,15000,22375"
)
n "tracker_header_5"
t "std_logic_vector"
b "(127 DOWNTO 0)"
o 1
r 14
st 0
s 0
sf 1
tg (CPTG
uid 2419,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2420,0
va (VaSet
)
xt "16000,21500,22600,22500"
st "tracker_header_5"
blo "16000,22300"
tm "CptPortNameMgr"
)
s (Text
uid 2421,0
va (VaSet
isHidden 1
)
xt "16000,22500,28900,23500"
blo "16000,23300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 2422,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,12800,77000,13600"
st "tracker_header_5    : IN     std_logic_vector (127 DOWNTO 0) ;
"
)
)
*19 (CptPort
uid 2423,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2424,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,22625,15000,23375"
)
n "tracker_header_6"
t "std_logic_vector"
b "(127 DOWNTO 0)"
o 1
r 15
st 0
s 0
sf 1
tg (CPTG
uid 2425,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2426,0
va (VaSet
)
xt "16000,22500,22600,23500"
st "tracker_header_6"
blo "16000,23300"
tm "CptPortNameMgr"
)
s (Text
uid 2427,0
va (VaSet
isHidden 1
)
xt "16000,23500,28900,24500"
blo "16000,24300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 2428,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,13600,77000,14400"
st "tracker_header_6    : IN     std_logic_vector (127 DOWNTO 0) ;
"
)
)
*20 (CptPort
uid 2429,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2430,0
ro 90
va (VaSet
vasetType 1
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