DocumentHdrVersion "1.1"
Header (DocumentHdr
packageRefs [
(PackageRef
library "ieee"
unitName "std_logic_1164"
itemName "all"
)
]
)
version "15.1"
appVersion "2002.1b (Build 7)"
model (Symbol
VExpander (VariableExpander
vvMap [
(vvPair
variable " "
value " "
)
(vvPair
variable "HDLDir"
value "D:\\CMS_FED\\back_end_fpga\\vhdl"
)
(vvPair
variable "SideDataDesignDir"
value "D:\\CMS_FED\\back_end_fpga\\src\\vme_cntrl_status\\interface.info"
)
(vvPair
variable "SideDataUserDir"
value "D:\\CMS_FED\\back_end_fpga\\src\\vme_cntrl_status\\interface.user"
)
(vvPair
variable "SourceDir"
value "D:\\CMS_FED\\back_end_fpga\\src"
)
(vvPair
variable "appl"
value "HDL Designer - Pro"
)
(vvPair
variable "d"
value "D:\\CMS_FED\\back_end_fpga\\src\\vme_cntrl_status"
)
(vvPair
variable "d_logical"
value "D:\\CMS_FED\\back_end_fpga\\src\\vme_cntrl_status"
)
(vvPair
variable "date"
value "06/03/04"
)
(vvPair
variable "day"
value "Thu"
)
(vvPair
variable "day_long"
value "Thursday"
)
(vvPair
variable "dd"
value "03"
)
(vvPair
variable "ext"
value "<TBD>"
)
(vvPair
variable "f"
value "interface"
)
(vvPair
variable "f_logical"
value "interface"
)
(vvPair
variable "group"
value "UNKNOWN"
)
(vvPair
variable "host"
value "TE2MALDIVES"
)
(vvPair
variable "library"
value "back_end_fpga"
)
(vvPair
variable "library_downstream_LeonardoSpectrum"
value "D:\\CMS_FED\\back_end_fpga\\ls"
)
(vvPair
variable "library_downstream_LeonardoSpectrum(GUI)"
value "D:\\CMS_FED\\back_end_fpga\\ls"
)
(vvPair
variable "library_downstream_ModelSim"
value "D:\\CMS_FED\\back_end_fpga\\sim"
)
(vvPair
variable "mm"
value "06"
)
(vvPair
variable "month"
value "Jun"
)
(vvPair
variable "month_long"
value "June"
)
(vvPair
variable "p"
value "D:\\CMS_FED\\back_end_fpga\\src\\vme_cntrl_status\\interface"
)
(vvPair
variable "p_logical"
value "D:\\CMS_FED\\back_end_fpga\\src\\vme_cntrl_status\\interface"
)
(vvPair
variable "series"
value "HDL Designer Series"
)
(vvPair
variable "time"
value "12:10:50"
)
(vvPair
variable "unit"
value "vme_cntrl_status"
)
(vvPair
variable "user"
value "st79"
)
(vvPair
variable "version"
value "2002.1b (Build 7)"
)
(vvPair
variable "view"
value "interface"
)
(vvPair
variable "year"
value "2004"
)
(vvPair
variable "yy"
value "04"
)
]
)
uid 51,0
optionalChildren [
*1 (SymbolBody
uid 8,0
optionalChildren [
*2 (CptPort
uid 11145,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11146,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "28000,32625,28750,33375"
)
n "apv_frame_en"
t "std_logic"
m 1
o 173
r 31
st 0
s 0
sf 1
tg (CPTG
uid 11147,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 11148,0
va (VaSet
)
xt "21600,32500,27000,33500"
st "apv_frame_en"
ju 2
blo "27000,33300"
tm "CptPortNameMgr"
)
s (Text
uid 11149,0
va (VaSet
isHidden 1
)
xt "23900,33500,27000,34500"
ju 2
blo "23900,34300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11150,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,26400,67500,27200"
st "apv_frame_en          : OUT    std_logic  ;
"
)
)
*3 (CptPort
uid 11151,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11152,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "28000,12625,28750,13375"
)
n "back_pressure_B"
t "std_logic"
m 1
o 145
r 32
st 0
s 0
sf 1
tg (CPTG
uid 11153,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 11154,0
va (VaSet
)
xt "20400,12500,27000,13500"
st "back_pressure_B"
ju 2
blo "27000,13300"
tm "CptPortNameMgr"
)
s (Text
uid 11155,0
va (VaSet
isHidden 1
)
xt "23900,13500,27000,14500"
ju 2
blo "23900,14300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11156,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,27200,67500,28000"
st "back_pressure_B       : OUT    std_logic  ;
"
)
)
*4 (CptPort
uid 11157,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11158,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "28000,36625,28750,37375"
)
n "be_status_reg"
t "std_logic_vector"
b "(31 DOWNTO 0)"
m 1
o 191
r 33
st 0
s 0
sf 1
tg (CPTG
uid 11159,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 11160,0
va (VaSet
)
xt "21400,36500,27000,37500"
st "be_status_reg"
ju 2
blo "27000,37300"
tm "CptPortNameMgr"
)
s (Text
uid 11161,0
va (VaSet
isHidden 1
)
xt "14500,37500,27000,38500"
ju 2
blo "14500,38300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11162,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,28000,77500,28800"
st "be_status_reg         : OUT    std_logic_vector (31 DOWNTO 0) ;
"
)
)
*5 (CptPort
uid 11163,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11164,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,22625,15000,23375"
)
n "bx_count"
t "std_logic_vector"
b "(11 DOWNTO 0)"
o 176
r 3
st 0
s 0
sf 1
tg (CPTG
uid 11165,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 11166,0
va (VaSet
)
xt "16000,22500,18900,23500"
st "bx_count"
blo "16000,23300"
tm "CptPortNameMgr"
)
s (Text
uid 11167,0
va (VaSet
isHidden 1
)
xt "16000,23500,28500,24500"
blo "16000,24300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11168,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4000,77500,4800"
st "bx_count              : IN     std_logic_vector (11 DOWNTO 0) ;
"
)
)
*6 (CptPort
uid 11169,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11170,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,42625,15000,43375"
)
n "clk1x"
t "std_logic"
o 109
r 4
st 0
s 0
sf 1
tg (CPTG
uid 11171,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 11172,0
va (VaSet
)
xt "16000,42500,17600,43500"
st "clk1x"
blo "16000,43300"
tm "CptPortNameMgr"
)
s (Text
uid 11173,0
va (VaSet
isHidden 1
)
xt "16000,43500,19100,44500"
blo "16000,44300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11174,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4800,67500,5600"
st "clk1x                 : IN     std_logic  ;
"
)
)
*7 (CptPort
uid 11175,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11176,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,41625,15000,42375"
)
n "clk2x"
t "std_logic"
o 110
r 5
st 0
s 0
sf 1
tg (CPTG
uid 11177,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 11178,0
va (VaSet
)
xt "16000,41500,17600,42500"
st "clk2x"
blo "16000,42300"
tm "CptPortNameMgr"
)
s (Text
uid 11179,0
va (VaSet
isHidden 1
)
xt "16000,42500,19100,43500"
blo "16000,43300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11180,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,5600,67500,6400"
st "clk2x                 : IN     std_logic  ;
"
)
)
*8 (CptPort
uid 11181,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11182,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,7625,15000,8375"
)
n "config_in"
t "std_logic_vector"
b "(8 DOWNTO 1)"
o 1
r 6
st 0
s 0
sf 1
tg (CPTG
uid 11183,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 11184,0
va (VaSet
)
xt "16000,7500,19100,8500"
st "config_in"
blo "16000,8300"
tm "CptPortNameMgr"
)
s (Text
uid 11185,0
va (VaSet
isHidden 1
)
xt "16000,8500,28100,9500"
blo "16000,9300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11186,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,6400,77000,7200"
st "config_in             : IN     std_logic_vector (8 DOWNTO 1) ;
"
)
)
*9 (CptPort
uid 11187,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11188,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "28000,28625,28750,29375"
)
n "config_out"
t "std_logic_vector"
b "(8 DOWNTO 1)"
m 1
o 67
r 34
st 0
s 0
sf 1
tg (CPTG
uid 11189,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 11190,0
va (VaSet
)
xt "22700,28500,27000,29500"
st "config_out"
ju 2
blo "27000,29300"
tm "CptPortNameMgr"
)
s (Text
uid 11191,0
va (VaSet
isHidden 1
)
xt "14900,29500,27000,30500"
ju 2
blo "14900,30300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11192,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,28800,77000,29600"
st "config_out            : OUT    std_logic_vector (8 DOWNTO 1) ;
"
)
)
*10 (CptPort
uid 11193,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11194,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,30625,15000,31375"
)
n "empty_flags"
t "std_logic_vector"
b "(7 DOWNTO 0)"
o 186
r 7
st 0
s 0
sf 1
tg (CPTG
uid 11195,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 11196,0
va (VaSet
)
xt "16000,30500,20800,31500"
st "empty_flags"
blo "16000,31300"
tm "CptPortNameMgr"
)
s (Text
uid 11197,0
va (VaSet
isHidden 1
)
xt "16000,31500,28100,32500"
blo "16000,32300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11198,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,7200,77000,8000"
st "empty_flags           : IN     std_logic_vector (7 DOWNTO 0) ;
"
)
)
*11 (CptPort
uid 11199,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11200,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "28000,19625,28750,20375"
)
n "en_fe_data_capture"
t "std_logic"
m 1
o 141
r 35
st 0
s 0
sf 1
tg (CPTG
uid 11201,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 11202,0
va (VaSet
)
xt "19700,19500,27000,20500"
st "en_fe_data_capture"
ju 2
blo "27000,20300"
tm "CptPortNameMgr"
)
s (Text
uid 11203,0
va (VaSet
isHidden 1
)
xt "23900,20500,27000,21500"
ju 2
blo "23900,21300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11204,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,29600,67500,30400"
st "en_fe_data_capture    : OUT    std_logic  ;
"
)
)
*12 (CptPort
uid 11205,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11206,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "28000,18625,28750,19375"
)
n "en_qdr_data_to_slink"
t "std_logic"
m 1
o 142
r 36
st 0
s 0
sf 1
tg (CPTG
uid 11207,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 11208,0
va (VaSet
)
xt "18700,18500,27000,19500"
st "en_qdr_data_to_slink"
ju 2
blo "27000,19300"
tm "CptPortNameMgr"
)
s (Text
uid 11209,0
va (VaSet
isHidden 1
)
xt "23900,19500,27000,20500"
ju 2
blo "23900,20300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11210,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,30400,67500,31200"
st "en_qdr_data_to_slink  : OUT    std_logic  ;
"
)
)
*13 (CptPort
uid 11211,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11212,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "28000,17625,28750,18375"
)
n "en_qdr_data_to_vme"
t "std_logic"
m 1
o 139
r 37
st 0
s 0
sf 1
tg (CPTG
uid 11213,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 11214,0
va (VaSet
)
xt "19300,17500,27000,18500"
st "en_qdr_data_to_vme"
ju 2
blo "27000,18300"
tm "CptPortNameMgr"
)
s (Text
uid 11215,0
va (VaSet
isHidden 1
)
xt "23900,18500,27000,19500"
ju 2
blo "23900,19300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11216,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,31200,67500,32000"
st "en_qdr_data_to_vme    : OUT    std_logic  ;
"
)
)
*14 (CptPort
uid 11217,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11218,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "28000,30625,28750,31375"
)
n "en_trigger"
t "std_logic"
m 1
o 173
r 38
st 0
s 0
sf 1
tg (CPTG
uid 11219,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 11220,0
va (VaSet
)
xt "22600,30500,27000,31500"
st "en_trigger"
ju 2
blo "27000,31300"
tm "CptPortNameMgr"
)
s (Text
uid 11221,0
va (VaSet
isHidden 1
)
xt "23900,31500,27000,32500"
ju 2
blo "23900,32300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11222,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,32000,67500,32800"
st "en_trigger            : OUT    std_logic  ;
"
)
)
*15 (CptPort
uid 11223,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11224,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "28000,23625,28750,24375"
)
n "FE_enable_reg"
t "std_logic_vector"
b "(8 DOWNTO 1)"
m 1
o 168
r 29
st 0
s 0
sf 1
tg (CPTG
uid 11225,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 11226,0
va (VaSet
)
xt "21000,23500,27000,24500"
st "FE_enable_reg"
ju 2
blo "27000,24300"
tm "CptPortNameMgr"
)
s (Text
uid 11227,0
va (VaSet
isHidden 1
)
xt "14900,24500,27000,25500"
ju 2
blo "14900,25300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11228,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,24800,77000,25600"
st "FE_enable_reg         : OUT    std_logic_vector (8 DOWNTO 1) ;
"
)
)
*16 (CptPort
uid 11229,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11230,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "28000,24625,28750,25375"
)
n "FE_frame_sync_en"
t "std_logic_vector"
b "(8 DOWNTO 1)"
m 1
o 174
r 30
st 0
s 0
sf 1
tg (CPTG
uid 11231,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 11232,0
va (VaSet
)
xt "19800,24500,27000,25500"
st "FE_frame_sync_en"
ju 2
blo "27000,25300"
tm "CptPortNameMgr"
)
s (Text
uid 11233,0
va (VaSet
isHidden 1
)
xt "14900,25500,27000,26500"
ju 2
blo "14900,26300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11234,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,25600,77000,26400"
st "FE_frame_sync_en      : OUT    std_logic_vector (8 DOWNTO 1) ;
"
)
)
*17 (CptPort
uid 11235,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11236,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "28000,25625,28750,26375"
)
n "fed_id_reg"
t "std_logic_vector"
b "(11 DOWNTO 0)"
m 1
o 179
r 39
st 0
s 0
sf 1
tg (CPTG
uid 11237,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 11238,0
va (VaSet
)
xt "22600,25500,27000,26500"
st "fed_id_reg"
ju 2
blo "27000,26300"
tm "CptPortNameMgr"
)
s (Text
uid 11239,0
va (VaSet
isHidden 1
)
xt "14500,26500,27000,27500"
ju 2
blo "14500,27300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11240,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,32800,77500,33600"
st "fed_id_reg            : OUT    std_logic_vector (11 DOWNTO 0) ;
"
)
)
*18 (CptPort
uid 11241,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11242,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,26625,15000,27375"
)
n "full_flags"
t "std_logic_vector"
b "(7 DOWNTO 0)"
o 178
r 8
st 0
s 0
sf 1
tg (CPTG
uid 11243,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 11244,0
va (VaSet
)
xt "16000,26500,19900,27500"
st "full_flags"
blo "16000,27300"
tm "CptPortNameMgr"
)
s (Text
uid 11245,0
va (VaSet
isHidden 1
)
xt "16000,27500,28100,28500"
blo "16000,28300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11246,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,8000,77000,8800"
st "full_flags            : IN     std_logic_vector (7 DOWNTO 0) ;
"
)
)
*19 (CptPort
uid 11247,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11248,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,28625,15000,29375"
)
n "half_full_flags"
t "std_logic_vector"
b "(7 DOWNTO 0)"
o 201
r 9
st 0
s 0
sf 1
tg (CPTG
uid 11249,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 11250,0
va (VaSet
)
xt "16000,28500,21500,29500"
st "half_full_flags"
blo "16000,29300"
tm "CptPortNameMgr"
)
s (Text
uid 11251,0
va (VaSet
isHidden 1
)
xt "16000,29500,28100,30500"
blo "16000,30300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11252,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,8800,77000,9600"
st "half_full_flags       : IN     std_logic_vector (7 DOWNTO 0) ;
"
)
)
*20 (CptPort
uid 11253,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11254,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,18625,15000,19375"
)
n "internal_freeze_bar"
t "std_logic"
o 137
r 10
st 0
s 0
sf 1
tg (CPTG
uid 11255,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 11256,0
va (VaSet
)
xt "16000,18500,23300,19500"
st "internal_freeze_bar"
blo "16000,19300"
tm "CptPortNameMgr"
)
s (Text
uid 11257,0
va (VaSet
isHidden 1
)
xt "16000,19500,19100,20500"
blo "16000,20300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11258,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,9600,67500,10400"
st "internal_freeze_bar   : IN     std_logic  ;
"
)
)
*21 (CptPort
uid 11259,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11260,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,21625,15000,22375"
)
n "L1A_count"
t "std_logic_vector"
b "(23 DOWNTO 0)"
o 175
r 1
st 0
s 0
sf 1
tg (CPTG
uid 11261,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 11262,0
va (VaSet
)
xt "16000,21500,19500,22500"
st "L1A_count"
blo "16000,22300"
tm "CptPortNameMgr"
)
s (Text
uid 11263,0
va (VaSet
isHidden 1
)
xt "16000,22500,28500,23500"
blo "16000,23300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11264,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,2400,77500,3200"
st "L1A_count             : IN     std_logic_vector (23 DOWNTO 0) ;
"
)
)
*22 (CptPort
uid 11265,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11266,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "28000,14625,28750,15375"
)
n "lm82_scl"
t "std_logic"
m 1
o 186
r 40
st 0
s 0
sf 1
tg (CPTG
uid 11267,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 11268,0
va (VaSet
)
xt "24000,14500,27000,15500"
st "lm82_scl"
ju 2
blo "27000,15300"
tm "CptPortNameMgr"
)
s (Text
uid 11269,0
va (VaSet
isHidden 1
)
xt "23900,15500,27000,16500"
ju 2
blo "23900,16300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11270,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,33600,67500,34400"
st "lm82_scl              : OUT    std_logic  ;
"
)
)
*23 (CptPort
uid 11271,0
ps "OnEdgeStrategy"
shape (Diamond
uid 11272,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "28000,15625,28750,16375"
)
n "lm82_sda"
t "std_logic"
m 2
o 187
r 50
st 0
s 0
sf 1
tg (CPTG
uid 11273,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 11274,0
va (VaSet
)
xt "23800,15500,27000,16500"
st "lm82_sda"
ju 2
blo "27000,16300"
tm "CptPortNameMgr"
)
s (Text
uid 11275,0
va (VaSet
isHidden 1
)
xt "23900,16500,27000,17500"
ju 2
blo "23900,17300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11276,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,41600,67500,42400"
st "lm82_sda              : INOUT  std_logic  ;
"
)
)
*24 (CptPort
uid 11277,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11278,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,10625,15000,11375"
)
n "local_vme_read"
t "std_logic"
o 13
r 11
st 0
s 0
sf 1
tg (CPTG
uid 11279,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 11280,0
va (VaSet
)
xt "16000,10500,22000,11500"
st "local_vme_read"
blo "16000,11300"
tm "CptPortNameMgr"
)
s (Text
uid 11281,0
va (VaSet
isHidden 1
)
xt "16000,11500,19100,12500"
blo "16000,12300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11282,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,10400,67500,11200"
st "local_vme_read        : IN     std_logic  ;
"
)
)
*25 (CptPort
uid 11283,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11284,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,11625,15000,12375"
)
n "local_vme_write"
t "std_logic"
o 13
r 12
st 0
s 0
sf 1
tg (CPTG
uid 11285,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 11286,0
va (VaSet
)
xt "16000,11500,22100,12500"
st "local_vme_write"
blo "16000,12300"
tm "CptPortNameMgr"
)
s (Text
uid 11287,0
va (VaSet
isHidden 1
)
xt "16000,12500,19100,13500"
blo "16000,13300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11288,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,11200,67500,12000"
st "local_vme_write       : IN     std_logic  ;
"
)
)
*26 (CptPort
uid 11289,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11290,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "28000,22625,28750,23375"
)
n "mode_reg"
t "std_logic_vector"
b "(3 DOWNTO 0)"
m 1
o 163
r 41
st 0
s 0
sf 1
tg (CPTG
uid 11291,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 11292,0
va (VaSet
)
xt "23600,22500,27000,23500"
st "mode_reg"
ju 2
blo "27000,23300"
tm "CptPortNameMgr"
)
s (Text
uid 11293,0
va (VaSet
isHidden 1
)
xt "14900,23500,27000,24500"
ju 2
blo "14900,24300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11294,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,34400,77000,35200"
st "mode_reg              : OUT    std_logic_vector (3 DOWNTO 0) ;
"
)
)
*27 (CptPort
uid 11295,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11296,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,29625,15000,30375"
)
n "partial_empty_flags"
t "std_logic_vector"
b "(7 DOWNTO 0)"
o 200
r 13
st 0
s 0
sf 1
tg (CPTG
uid 11297,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 11298,0
va (VaSet
)
xt "16000,29500,23300,30500"
st "partial_empty_flags"
blo "16000,30300"
tm "CptPortNameMgr"
)
s (Text
uid 11299,0
va (VaSet
isHidden 1
)
xt "16000,30500,28100,31500"
blo "16000,31300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11300,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,12000,77000,12800"
st "partial_empty_flags   : IN     std_logic_vector (7 DOWNTO 0) ;
"
)
)
*28 (CptPort
uid 11301,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11302,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,27625,15000,28375"
)
n "partial_full_flags"
t "std_logic_vector"
b "(7 DOWNTO 0)"
o 178
r 14
st 0
s 0
sf 1
tg (CPTG
uid 11303,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 11304,0
va (VaSet
)
xt "16000,27500,22400,28500"
st "partial_full_flags"
blo "16000,28300"
tm "CptPortNameMgr"
)
s (Text
uid 11305,0
va (VaSet
isHidden 1
)
xt "16000,28500,28100,29500"
blo "16000,29300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11306,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,12800,77000,13600"
st "partial_full_flags    : IN     std_logic_vector (7 DOWNTO 0) ;
"
)
)
*29 (CptPort
uid 11307,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11308,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,23625,15000,24375"
)
n "qdr_data_count"
t "std_logic_vector"
b "(17 DOWNTO 0)"
o 177
r 15
st 0
s 0
sf 1
tg (CPTG
uid 11309,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 11310,0
va (VaSet
)
xt "16000,23500,22000,24500"
st "qdr_data_count"
blo "16000,24300"
tm "CptPortNameMgr"
)
s (Text
uid 11311,0
va (VaSet
isHidden 1
)
xt "16000,24500,28500,25500"
blo "16000,25300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11312,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,13600,77500,14400"
st "qdr_data_count        : IN     std_logic_vector (17 DOWNTO 0) ;
"
)
)
*30 (CptPort
uid 11313,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11314,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,24625,15000,25375"
)
n "qdr_frame_count"
t "std_logic_vector"
b "(23 DOWNTO 0)"
o 178
r 16
st 0
s 0
sf 1
tg (CPTG
uid 11315,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 11316,0
va (VaSet
)
xt "16000,24500,22500,25500"
st "qdr_frame_count"
blo "16000,25300"
tm "CptPortNameMgr"
)
s (Text
uid 11317,0
va (VaSet
isHidden 1
)
xt "16000,25500,28500,26500"
blo "16000,26300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11318,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,14400,77500,15200"
st "qdr_frame_count       : IN     std_logic_vector (23 DOWNTO 0) ;
"
)
)
*31 (CptPort
uid 11319,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11320,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "28000,34625,28750,35375"
)
n "qdr_test_data_en"
t "std_logic_vector"
b "(1 DOWNTO 0)"
m 1
o 185
r 42
st 0
s 0
sf 1
tg (CPTG
uid 11321,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 11322,0
va (VaSet
)
xt "20400,34500,27000,35500"
st "qdr_test_data_en"
ju 2
blo "27000,35300"
tm "CptPortNameMgr"
)
s (Text
uid 11323,0
va (VaSet
isHidden 1
)
xt "14900,35500,27000,36500"
ju 2
blo "14900,36300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11324,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,35200,77000,36000"
st "qdr_test_data_en      : OUT    std_logic_vector (1 DOWNTO 0) ;
"
)
)
*32 (CptPort
uid 11325,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11326,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,44625,15000,45375"
)
n "reset"
t "std_logic"
o 13
r 17
st 0
s 0
sf 1
tg (CPTG
uid 11327,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 11328,0
va (VaSet
)
xt "16000,44500,17700,45500"
st "reset"
blo "16000,45300"
tm "CptPortNameMgr"
)
s (Text
uid 11329,0
va (VaSet
isHidden 1
)
xt "16000,45500,19100,46500"
blo "16000,46300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11330,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,15200,67500,16000"
st "reset                 : IN     std_logic  ;
"
)
)
*33 (CptPort
uid 11331,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11332,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,43625,15000,44375"
)
n "rst"
t "std_logic"
o 13
r 18
st 0
s 0
sf 1
tg (CPTG
uid 11333,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 11334,0
va (VaSet
)
xt "16000,43500,16900,44500"
st "rst"
blo "16000,44300"
tm "CptPortNameMgr"
)
s (Text
uid 11335,0
va (VaSet
isHidden 1
)
xt "16000,44500,19100,45500"
blo "16000,45300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11336,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,16000,67500,16800"
st "rst                   : IN     std_logic  ;
"
)
)
*34 (CptPort
uid 11337,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11338,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "28000,27625,28750,28375"
)
n "sel_trig_source"
t "std_logic_vector"
b "(2 DOWNTO 0)"
m 1
o 164
r 43
st 0
s 0
sf 1
tg (CPTG
uid 11339,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 11340,0
va (VaSet
)
xt "20900,27500,27000,28500"
st "sel_trig_source"
ju 2
blo "27000,28300"
tm "CptPortNameMgr"
)
s (Text
uid 11341,0
va (VaSet
isHidden 1
)
xt "14900,28500,27000,29500"
ju 2
blo "14900,29300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11342,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,36000,77000,36800"
st "sel_trig_source       : OUT    std_logic_vector (2 DOWNTO 0) ;
"
)
)
*35 (CptPort
uid 11343,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11344,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,16625,15000,17375"
)
n "slink_ldown_b"
t "std_logic"
o 13
r 19
st 0
s 0
sf 1
tg (CPTG
uid 11345,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 11346,0
va (VaSet
)
xt "16000,16500,21400,17500"
st "slink_ldown_b"
blo "16000,17300"
tm "CptPortNameMgr"
)
s (Text
uid 11347,0
va (VaSet
isHidden 1
)
xt "16000,17500,19100,18500"
blo "16000,18300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11348,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,16800,67500,17600"
st "slink_ldown_b         : IN     std_logic  ;
"
)
)
*36 (CptPort
uid 11349,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11350,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,15625,15000,16375"
)
n "slink_lff_b"
t "std_logic"
o 185
r 20
st 0
s 0
sf 1
tg (CPTG
uid 11351,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 11352,0
va (VaSet
)
xt "16000,15500,20100,16500"
st "slink_lff_b"
blo "16000,16300"
tm "CptPortNameMgr"
)
s (Text
uid 11353,0
va (VaSet
isHidden 1
)
xt "16000,16500,19100,17500"
blo "16000,17300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11354,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,17600,67500,18400"
st "slink_lff_b           : IN     std_logic  ;
"
)
)
*37 (CptPort
uid 11355,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11356,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "28000,21625,28750,22375"
)
n "sw_reset"
t "std_logic"
m 1
o 174
r 44
st 0
s 0
sf 1
tg (CPTG
uid 11357,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 11358,0
va (VaSet
)
xt "24000,21500,27000,22500"
st "sw_reset"
ju 2
blo "27000,22300"
tm "CptPortNameMgr"
)
s (Text
uid 11359,0
va (VaSet
isHidden 1
)
xt "23900,22500,27000,23500"
ju 2
blo "23900,23300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11360,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,36800,67500,37600"
st "sw_reset              : OUT    std_logic  ;
"
)
)
*38 (CptPort
uid 11361,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11362,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "28000,31625,28750,32375"
)
n "sw_trigger"
t "std_logic"
m 1
o 146
r 45
st 0
s 0
sf 1
tg (CPTG
uid 11363,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 11364,0
va (VaSet
)
xt "22500,31500,27000,32500"
st "sw_trigger"
ju 2
blo "27000,32300"
tm "CptPortNameMgr"
)
s (Text
uid 11365,0
va (VaSet
isHidden 1
)
xt "23900,32500,27000,33500"
ju 2
blo "23900,33300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11366,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,37600,67500,38400"
st "sw_trigger            : OUT    std_logic  ;
"
)
)
*39 (CptPort
uid 11367,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11368,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,37625,15000,38375"
)
n "temp_int_b"
t "std_logic"
o 13
r 21
st 0
s 0
sf 1
tg (CPTG
uid 11369,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 11370,0
va (VaSet
)
xt "16000,37500,20400,38500"
st "temp_int_b"
blo "16000,38300"
tm "CptPortNameMgr"
)
s (Text
uid 11371,0
va (VaSet
isHidden 1
)
xt "16000,38500,19100,39500"
blo "16000,39300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11372,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,18400,67500,19200"
st "temp_int_b            : IN     std_logic  ;
"
)
)
*40 (CptPort
uid 11373,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11374,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "28000,38625,28750,39375"
)
n "throttle_en"
t "std_logic"
m 1
o 187
r 46
st 0
s 0
sf 1
tg (CPTG
uid 11375,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 11376,0
va (VaSet
)
xt "22700,38500,27000,39500"
st "throttle_en"
ju 2
blo "27000,39300"
tm "CptPortNameMgr"
)
s (Text
uid 11377,0
va (VaSet
isHidden 1
)
xt "23900,39500,27000,40500"
ju 2
blo "23900,40300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11378,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,38400,67500,39200"
st "throttle_en           : OUT    std_logic  ;
"
)
)
*41 (CptPort
uid 11379,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11380,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,20625,15000,21375"
)
n "total_frame_count"
t "std_logic_vector"
b "(23 DOWNTO 0)"
o 180
r 22
st 0
s 0
sf 1
tg (CPTG
uid 11381,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 11382,0
va (VaSet
)
xt "16000,20500,22700,21500"
st "total_frame_count"
blo "16000,21300"
tm "CptPortNameMgr"
)
s (Text
uid 11383,0
va (VaSet
isHidden 1
)
xt "16000,21500,28500,22500"
blo "16000,22300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11384,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,19200,77500,20000"
st "total_frame_count     : IN     std_logic_vector (23 DOWNTO 0) ;
"
)
)
*42 (CptPort
uid 11385,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11386,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,35625,15000,36375"
)
n "ttc_broadcast_command"
t "std_logic_vector"
b "(12 DOWNTO 0)"
o 198
r 23
st 0
s 0
sf 1
tg (CPTG
uid 11387,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 11388,0
va (VaSet
)
xt "16000,35500,25300,36500"
st "ttc_broadcast_command"
blo "16000,36300"
tm "CptPortNameMgr"
)
s (Text
uid 11389,0
va (VaSet
isHidden 1
)
xt "16000,36500,28500,37500"
blo "16000,37300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11390,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,20000,77500,20800"
st "ttc_broadcast_command : IN     std_logic_vector (12 DOWNTO 0) ;
"
)
)
*43 (CptPort
uid 11391,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11392,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,13625,15000,14375"
)
n "ttc_ready"
t "std_logic"
o 178
r 24
st 0
s 0
sf 1
tg (CPTG
uid 11393,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 11394,0
va (VaSet
)
xt "16000,13500,19000,14500"
st "ttc_ready"
blo "16000,14300"
tm "CptPortNameMgr"
)
s (Text
uid 11395,0
va (VaSet
isHidden 1
)
xt "16000,14500,19100,15500"
blo "16000,15300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11396,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,20800,67500,21600"
st "ttc_ready             : IN     std_logic  ;
"
)
)
*44 (CptPort
uid 11397,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11398,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "28000,10625,28750,11375"
)
n "ttc_reset_b"
t "std_logic"
m 1
o 13
r 47
st 0
s 0
sf 1
tg (CPTG
uid 11399,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 11400,0
va (VaSet
)
xt "22500,10500,27000,11500"
st "ttc_reset_b"
ju 2
blo "27000,11300"
tm "CptPortNameMgr"
)
s (Text
uid 11401,0
va (VaSet
isHidden 1
)
xt "23900,11500,27000,12500"
ju 2
blo "23900,12300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11402,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,39200,67500,40000"
st "ttc_reset_b           : OUT    std_logic  ;
"
)
)
*45 (CptPort
uid 11403,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11404,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,39625,15000,40375"
)
n "TTC_rst_frm_vme_b"
t "std_logic"
o 185
r 2
st 0
s 0
sf 1
tg (CPTG
uid 11405,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 11406,0
va (VaSet
)
xt "16000,39500,23700,40500"
st "TTC_rst_frm_vme_b"
blo "16000,40300"
tm "CptPortNameMgr"
)
s (Text
uid 11407,0
va (VaSet
isHidden 1
)
xt "16000,40500,19100,41500"
blo "16000,41300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11408,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,3200,67500,4000"
st "TTC_rst_frm_vme_b     : IN     std_logic  ;
"
)
)
*46 (CptPort
uid 11409,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11410,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "28000,8625,28750,9375"
)
n "ttc_scl"
t "std_logic"
m 1
o 182
r 48
st 0
s 0
sf 1
tg (CPTG
uid 11411,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 11412,0
va (VaSet
)
xt "24800,8500,27000,9500"
st "ttc_scl"
ju 2
blo "27000,9300"
tm "CptPortNameMgr"
)
s (Text
uid 11413,0
va (VaSet
isHidden 1
)
xt "23900,9500,27000,10500"
ju 2
blo "23900,10300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11414,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,40000,67500,40800"
st "ttc_scl               : OUT    std_logic  ;
"
)
)
*47 (CptPort
uid 11415,0
ps "OnEdgeStrategy"
shape (Diamond
uid 11416,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "28000,9625,28750,10375"
)
n "ttc_sda"
t "std_logic"
m 2
o 13
r 51
st 0
s 0
sf 1
tg (CPTG
uid 11417,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 11418,0
va (VaSet
)
xt "24600,9500,27000,10500"
st "ttc_sda"
ju 2
blo "27000,10300"
tm "CptPortNameMgr"
)
s (Text
uid 11419,0
va (VaSet
isHidden 1
)
xt "23900,10500,27000,11500"
ju 2
blo "23900,11300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11420,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,42400,66500,43200"
st "ttc_sda               : INOUT  std_logic 
"
)
)
*48 (CptPort
uid 11421,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11422,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,34625,15000,35375"
)
n "ttc_single_command"
t "std_logic_vector"
b "(38 DOWNTO 0)"
o 199
r 25
st 0
s 0
sf 1
tg (CPTG
uid 11423,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 11424,0
va (VaSet
)
xt "16000,34500,23700,35500"
st "ttc_single_command"
blo "16000,35300"
tm "CptPortNameMgr"
)
s (Text
uid 11425,0
va (VaSet
isHidden 1
)
xt "16000,35500,28500,36500"
blo "16000,36300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11426,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,21600,77500,22400"
st "ttc_single_command    : IN     std_logic_vector (38 DOWNTO 0) ;
"
)
)
*49 (CptPort
uid 11427,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11428,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,9625,15000,10375"
)
n "vme_command_in"
t "std_logic"
o 143
r 26
st 0
s 0
sf 1
tg (CPTG
uid 11429,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 11430,0
va (VaSet
)
xt "16000,9500,22700,10500"
st "vme_command_in"
blo "16000,10300"
tm "CptPortNameMgr"
)
s (Text
uid 11431,0
va (VaSet
isHidden 1
)
xt "16000,10500,19100,11500"
blo "16000,11300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11432,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,22400,67500,23200"
st "vme_command_in        : IN     std_logic  ;
"
)
)
*50 (CptPort
uid 11433,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11434,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "28000,7625,28750,8375"
)
n "vme_command_out"
t "std_logic"
m 1
o 144
r 49
st 0
s 0
sf 1
tg (CPTG
uid 11435,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 11436,0
va (VaSet
)
xt "19900,7500,27000,8500"
st "vme_command_out"
ju 2
blo "27000,8300"
tm "CptPortNameMgr"
)
s (Text
uid 11437,0
va (VaSet
isHidden 1
)
xt "23900,8500,27000,9500"
ju 2
blo "23900,9300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11438,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,40800,67500,41600"
st "vme_command_out       : OUT    std_logic  ;
"
)
)
*51 (CptPort
uid 11439,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11440,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,12625,15000,13375"
)
n "vme_spare_in"
t "std_logic_vector"
b "(5 DOWNTO 1)"
o 145
r 27
st 0
s 0
sf 1
tg (CPTG
uid 11441,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 11442,0
va (VaSet
)
xt "16000,12500,21400,13500"
st "vme_spare_in"
blo "16000,13300"
tm "CptPortNameMgr"
)
s (Text
uid 11443,0
va (VaSet
isHidden 1
)
xt "16000,13500,28100,14500"
blo "16000,14300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11444,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,23200,77000,24000"
st "vme_spare_in          : IN     std_logic_vector (5 DOWNTO 1) ;
"
)
)
*52 (CptPort
uid 11445,0
ps "OnEdgeStrategy"
shape (Triangle
uid 11446,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,14625,15000,15375"
)
n "vme_throttle"
t "std_logic"
o 177
r 28
st 0
s 0
sf 1
tg (CPTG
uid 11447,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 11448,0
va (VaSet
)
xt "16000,14500,20800,15500"
st "vme_throttle"
blo "16000,15300"
tm "CptPortNameMgr"
)
s (Text
uid 11449,0
va (VaSet
isHidden 1
)
xt "16000,15500,19100,16500"
blo "16000,16300"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 11450,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,24000,67500,24800"
st "vme_throttle          : IN     std_logic  ;
"
)
)
]
shape (Rectangle
uid 9,0
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "15000,6000,28000,47000"
)
oxt "15000,6000,28000,23000"
biTextGroup (BiTextGroup
uid 10,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
first (Text
uid 11,0
va (VaSet
font "Arial,12,1"
)
xt "15800,25000,26000,26500"
st "back_end_fpga"
blo "15800,26200"
)
second (Text
uid 12,0
va (VaSet
font "Arial,12,1"
)
xt "15800,26500,27200,28000"
st "vme_cntrl_status"
blo "15800,27700"
)
)
gi *53 (GenericInterface
uid 13,0
ps "CenterOffsetStrategy"
matrix (Matrix
uid 14,0
text (MLText
uid 15,0
va (VaSet
isHidden 1
font "Courier New,10,0"
)
xt "-2500,22500,-2500,22500"
)
header "Generic Declarations"
)
elements [
]
)
portInstanceVisAsIs 1
portInstanceVis (PortSigDisplay
sIVOD 1
)
)
*54 (Grouping
uid 16,0
optionalChildren [
*55 (CommentText
uid 18,0
shape (Rectangle
uid 19,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "109000,101000,126000,102000"
)
oxt "18000,70000,35000,71000"
text (MLText
uid 20,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "109200,101000,118100,102000"
st "
by %user on %dd %month %year"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 17000
)
position 1
ignorePrefs 1
)
*56 (CommentText
uid 21,0
shape (Rectangle
uid 22,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "126000,97000,130000,98000"
)
oxt "35000,66000,39000,67000"
text (MLText
uid 23,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "126200,97000,128800,98000"
st "
Project:"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 4000
)
position 1
ignorePrefs 1
)
*57 (CommentText
uid 24,0
shape (Rectangle
uid 25,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "109000,99000,126000,100000"
)
oxt "18000,68000,35000,69000"
text (MLText
uid 26,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "109200,99000,119200,100000"
st "
<enter diagram title here>"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 17000
)
position 1
ignorePrefs 1
)
*58 (CommentText
uid 27,0
shape (Rectangle
uid 28,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "105000,99000,109000,100000"
)
oxt "14000,68000,18000,69000"
text (MLText
uid 29,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "105200,99000,106900,100000"
st "
Title:"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 4000
)
position 1
ignorePrefs 1
)
*59 (CommentText
uid 30,0
shape (Rectangle
uid 31,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "126000,98000,146000,102000"
)
oxt "35000,67000,55000,71000"
text (MLText
uid 32,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "126200,98200,135400,99200"
st "
<enter comments here>"
tm "CommentText"
wrapOption 3
visibleHeight 4000
visibleWidth 20000
)
ignorePrefs 1
)
*60 (CommentText
uid 33,0
shape (Rectangle
uid 34,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "130000,97000,146000,98000"
)
oxt "39000,66000,55000,67000"
text (MLText
uid 35,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "130200,97000,140300,98000"
st "
<enter project name here>"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 16000
)
position 1
ignorePrefs 1
)
*61 (CommentText
uid 36,0
shape (Rectangle
uid 37,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "105000,97000,126000,99000"
)
oxt "14000,66000,35000,68000"
text (MLText
uid 38,0
va (VaSet
fg "32768,0,0"
)
xt "112150,97350,118850,98350"
st "
<company name>"
ju 0
tm "CommentText"
wrapOption 3
visibleHeight 2000
visibleWidth 21000
)
position 1
ignorePrefs 1
)
*62 (CommentText
uid 39,0
shape (Rectangle
uid 40,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "105000,100000,109000,101000"
)
oxt "14000,69000,18000,70000"
text (MLText
uid 41,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "105200,100000,106900,101000"
st "
Path:"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 4000
)
position 1
ignorePrefs 1
)
*63 (CommentText
uid 42,0
shape (Rectangle
uid 43,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "105000,101000,109000,102000"
)
oxt "14000,70000,18000,71000"
text (MLText
uid 44,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "105200,101000,107500,102000"
st "
Edited:"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 4000
)
position 1
ignorePrefs 1
)
*64 (CommentText
uid 45,0
shape (Rectangle
uid 46,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "109000,100000,126000,101000"
)
oxt "18000,69000,35000,70000"
text (MLText
uid 47,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "109200,100000,124700,101000"
st "
%library/%unit/%view"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 17000
)
position 1
ignorePrefs 1
)
]
shape (GroupingShape
uid 17,0
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineStyle 2
lineWidth 2
)
xt "105000,97000,146000,102000"
)
oxt "14000,66000,55000,71000"
)
]
LanguageMgr "VhdlLangMgr"
bg "65535,65535,65535"
grid (Grid
origin "0,0"
isVisible 1
isActive 1
xSpacing 1000
xySpacing 1000
xShown 1
yShown 1
color "26368,26368,26368"
)
packageList *65 (PackageList
uid 48,0
stg "VerticalLayoutStrategy"
textVec [
*66 (Text
uid 49,0
va (VaSet
font "arial,10,1"
)
xt "0,0,7600,1200"
st "Package List"
blo "0,1000"
)
*67 (MLText
uid 50,0
va (VaSet
)
xt "0,1200,10900,3200"
st "LIBRARY ieee;
USE ieee.std_logic_1164.all;"
tm "PackageList"
)
]
)
windowSize "0,0,895,750"
viewArea "0,0,0,0"
cachedDiagramExtent "0,0,0,0"
pageBreakOrigin "0,0"
defaultCommentText (CommentText
shape (Rectangle
layer 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
lineColor "0,0,32768"
)
xt "0,0,15000,5000"
)
text (MLText
va (VaSet
fg "0,0,32768"
)
xt "200,200,1600,1200"
st "
Text"
tm "CommentText"
wrapOption 3
visibleHeight 4600
visibleWidth 14600
)
)
defaultPanel (Panel
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "32768,0,0"
lineWidth 3
)
xt "0,0,20000,20000"
)
title (TextAssociate
ps "TopLeftStrategy"
text (Text
va (VaSet
font "Arial,10,1"
)
xt "1000,1000,4400,2200"
st "Panel0"
blo "1000,2000"
tm "PanelText"
)
)
)
parentViewRef (DesignUnitViewRef
libraryName "back_end_fpga"
duName "top_level"
viewName "struct.bd"
)
defaultSymbolBody (SymbolBody
shape (Rectangle
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "15000,6000,33000,26000"
)
biTextGroup (BiTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
first (Text
va (VaSet
font "Arial,12,1"
)
xt "21500,14500,26500,16000"
st "<library>"
blo "21500,15700"
)
second (Text
va (VaSet
font "Arial,12,1"
)
xt "21500,16000,24900,17500"
st "<cell>"
blo "21500,17200"
)
)
gi *68 (GenericInterface
ps "CenterOffsetStrategy"
matrix (Matrix
text (MLText
va (VaSet
isHidden 1
font "Courier New,10,0"
)
xt "0,12000,0,12000"
)
header "Generic Declarations"
)
elements [
]
)
portInstanceVisAsIs 1
portInstanceVis (PortSigDisplay
sIVOD 1
)
)
defaultCptPort (CptPort
ps "OnEdgeStrategy"
shape (Triangle
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "0,0,750,750"
)
n "In0"
t "std_logic_vector"
b "(15 DOWNTO 0)"
o 0
r 0
d 0
s 0
sf 1
tg (CPTG
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
va (VaSet
)
xt "0,750,1500,2050"
st "In0"
blo "0,1750"
tm "CptPortNameMgr"
)
)
dt (MLText
va (VaSet
font "Courier New,8,0"
)
)
)
defaultCptPortBuffer (CptPort
ps "OnEdgeStrategy"
shape (Diamond
va (VaSet
vasetType 1
fg "65535,65535,65535"
bg "0,0,0"
)
xt "0,0,750,750"
)
n "Buffer0"
t "std_logic_vector"
b "(15 DOWNTO 0)"
m 3
o 0
r 0
d 0
s 0
sf 1
tg (CPTG
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
va (VaSet
)
xt "0,750,3400,2050"
st "Buffer0"
blo "0,1750"
tm "CptPortNameMgr"
)
)
dt (MLText
va (VaSet
font "Courier New,8,0"
)
)
)
DeclarativeBlock *69 (SymDeclBlock
uid 1,0
stg "SymDeclLayoutStrategy"
declLabel (Text
uid 2,0
va (VaSet
font "Arial,10,1"
)
xt "42000,0,49400,1200"
st "Declarations"
blo "42000,1000"
)
portLabel (Text
uid 3,0
va (VaSet
font "Arial,10,1"
)
xt "42000,1200,44900,2400"
st "Ports:"
blo "42000,2200"
)
externalLabel (Text
uid 4,0
va (VaSet
font "Arial,10,1"
)
xt "42000,43200,44600,44400"
st "User:"
blo "42000,44200"
)
internalLabel (Text
uid 6,0
va (VaSet
isHidden 1
font "Arial,10,1"
)
xt "42000,0,49800,1200"
st "Internal User:"
blo "42000,1000"
)
externalText (MLText
uid 5,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,44400,44000,44400"
tm "SyDeclarativeTextMgr"
)
internalText (MLText
uid 7,0
va (VaSet
isHidden 1
font "Courier New,8,0"
)
xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 11450,0
)
